; ; $Header: E:/HAM/EVM/RCS/leonid.asm 1.5 1999/01/21 08:28:12 dbraun Exp $ ; ; $Log: leonid.asm $ ; Revision 1.5 1999/01/21 08:28:12 dbraun ; Added VE7TMA's improved waitblk2 macro. ; ; Revision 1.4 1997/01/14 23:02:42 dbraun ; Changed hard-coded address of y:flag from 0002 to 0003 to ; match chnages to bios2.asm. ; ; Revision 1.3 1996/11/30 15:22:57 dbraun ; Added hardreset macro that fakes a hardware reset ; ; Revision 1.2 1996/10/14 13:18:55 dbraun ; Monitor now starts at P/X:3800, and serial buffers at Y:3800 ; Now application can use everything form $0100 to $37FF in P/X and Y ; ; Revision 1.1 1996/10/14 12:30:07 dbraun ; Initial revision ; ; ;***************************************************************************** ;* LEONID.ASM -- Alef Null DSP CARD 4 monitor interface * ;* * ;* Here are equates for services provided by DSP CARD 4 * ;* monitor. * ;* * ;* Copyright (C) 1992-1995 by Alef Null. All rights reserved. * ;* Author(s): Jarkko Vuori, OH2LNS * ;* Modification(s): * ; EVM addresses -- JBF * ; MICGAIN -- JBF 8/17/95 * ; Disable/Enable interrupts in opencd -- JBF 2/27/96 * ; Define different memory and clock crystals * ;***************************************************************************** ;********************* I M P O R T A N T ******************************* ;***************************************************************************** ; As a user you must: ; 1).....Choose the card that you are using., ; 2).....Select the clock frequency that you wish to use. ; 3).....Select the SCI baudrate you wish to use ;***************************************************************************** ;********************* DO IT HERE AND ONLY HERE ************************** ;***************************************************************************** EVM56K equ 1 ;0 => DSPCARD4 ;1 => EVM56002 - standard ;2 => EVM56002 - expanded if (EVM56K>0) ;----------------------------------------------------------------------------- ; Select EVM clock speed ; Some 66MHz parts will run up to 80 MHz ;----------------------------------------------------------------------------- ;xtal equ 32000000 ; 32 MHz for most accurate SCI baudrates ;xtal equ 40000000 ; 40 MHz for standard EVM ;xtal equ 66000000 ; 66 MHz for new EVM's !!!NOT DIVISIBLE BY 4!!! xtal equ 68000000 ; 68 MHz experimental ;xtal equ 80000000 ; 80 MHz experimental endif if (EVM56K==0) ;----------------------------------------------------------------------------- ; Select DSP4 CARD clock speed ;----------------------------------------------------------------------------- xtal equ 27000000 ; XTAL frq (in MHz) ;xtal equ 29500000 ;xtal equ 33000000 endif ;---------------------------------------------------------------------------- ; SCI parameters ; (Choose your default SCI baudrate) ;---------------------------------------------------------------------------- ;baud equ 9600 ; Testing baud equ 19200 ; SCI baud rate ;***************************************************************************** ;***************************************************************************** ;----------------------------------------------------------------------------- ; Start of the user program and data areas ;----------------------------------------------------------------------------- user_code equ $0040 ; user P-memory starting address user_data equ $0018 ; use X- and Y-memories starting address if (EVM56K==2) ; EVMs allocate buffers differently topmem equ $6800 ; upper memory used for booting kiss_pars equ topmem ; and SCI buffers sci_buflen equ 2048 ; buffer size endif if (EVM56K==1) ; standard EVM ;topmem equ $1400 ;N1OWU: Let monitor sit from P:3800 to end of P/X RAM at 3FFF ;The serial buffers will be from Y:3800 to 3FFF topmem equ $3800 kiss_pars equ topmem sci_buflen equ 1024 endif ;----------------------------------------------------------------------------- ; Macro for target system detecting (simulator or DSP CARD 4 platform) ;----------------------------------------------------------------------------- system macro target if @scp("target",'simulator')!=0 sim_debug else if @scp("target",'dsp4')==0 fail "No such system: target, known systems are dsp4 or simulator" endif endif endm ;----------------------------------------------------------------------------- ; Open serial communication port (reset all buffers) ; a - kiss command routine address (zero if not is kiss mode) ; b - xmit on/off routine address ;----------------------------------------------------------------------------- opensc macro jsr <$0020 endm ;----------------------------------------------------------------------------- ; Put a byte in x0 to the serial output ;----------------------------------------------------------------------------- putc macro jsr <$0022 endm ;----------------------------------------------------------------------------- ; Request a character from the serial input ; waits until character given and returns it in x0 ;----------------------------------------------------------------------------- getc macro _gc1 wait jsr <$0024 jcs _gc1 endm ;----------------------------------------------------------------------------- ; Look if there are characters waiting at the serial input ; If specified, wait for a given time (in seconds) ; returns C if there are no data available ; NC if there are data, and received data is placed to x0 ;----------------------------------------------------------------------------- lookc macro time if time==0 jsr <$0024 else move #>@cvi(time*19200),x0 ; set timer jsr <$0034 _cwait wait jsr <$0024 ; check if we have a character available jcc _cfnd ; Look at bit #timer of y:flags jset #4,y:$0003,_cwait ; no, are we tired for waiting ori #$01,ccr ; yes, ensure that C condition is met _cfnd nop endif endm ;----------------------------------------------------------------------------- ; Test if there are characters waiting at the serial input ; returns C if there are no data available ; NC if there are data available ;----------------------------------------------------------------------------- tstc macro jsr <$0026 endm ;----------------------------------------------------------------------------- ; Terminate KISS output frame ;----------------------------------------------------------------------------- endc macro jsr <$0028 endm ;----------------------------------------------------------------------------- ; Reject KISS output frame ;----------------------------------------------------------------------------- rejc macro jsr <$002A endm ;----------------------------------------------------------------------------- ; put next bit in C to the host transmit queue ;----------------------------------------------------------------------------- putbit macro jsr <$002C endm ;----------------------------------------------------------------------------- ; returns next bit to be sent in C ; returns Z if this is an end of the transmission ;----------------------------------------------------------------------------- getbit macro jsr <$002E endm ;----------------------------------------------------------------------------- ; Open codec ; fs is the desired sampling rate (8,9.6,16,27.42857,32,48) ; hpf is the high-pass filter enable (NOHPF,HPF) ;----------------------------------------------------------------------------- NOHPF equ $0000 HPF equ $8000 MICGAIN equ $100000 ; Disable 20 dB MIC gain ;;MICGAIN equ $000000 ; Enable 20 dB MIC gain opencd macro fs,hpf ori #3,mr ; disable interrupts ----JBF---- if @def(sim_debug)==0 if fs==8 move #>$000000|MICGAIN|hpf,x0 else if fs==9.6 move #>$003800|MICGAIN|hpf,x0 else if fs==16 move #>$000800|MICGAIN|hpf,x0 else if fs==27.42857 move #>$001000|MICGAIN|hpf,x0 else if fs==32 move #>$001800|MICGAIN|hpf,x0 else if fs==48 move #>$003000|MICGAIN|hpf,x0 else fail "Illegal sampling rate: fs" endif endif endif endif endif endif jsr <$0030 endif andi #$fc,mr ; unmask interrupts ---JBF--- endm ;----------------------------------------------------------------------------- ; Set codecs input and output settings ;----------------------------------------------------------------------------- HEADP equ $8000 LINEO equ $4000 SPEAKER equ $0040 LINEI equ $0000 MIC equ $1000 ctrlcd macro init,reg,len,inputs,lgain,rgain,outputs,loattn,roattn if @def(sim_debug)==0 if (lgain>22.5)|(rgain>22.5)|(loattn>94.5)|(roattn>94.5) fail 'Illegal input gain or output attenuation' endif move #(inputs|$f0|(@cvi(lgain/1.5)<<8)|@cvi(rgain/1.5))<<8,x0 clr a #(outputs|(@cvi(loattn/1.5)<<8)|@cvi(roattn/1.5))<<8,x1 move (reg)+ do #len,_initcs if init move a,y:(reg)+ move a,y:(reg)+ else move (reg)+ move (reg)+ endif move x1,y:(reg)+ move x0,y:(reg)+ _initcs move (reg)- endif endm ;----------------------------------------------------------------------------- ; Close codec ;----------------------------------------------------------------------------- closecd macro jsr <$0032 endm ;----------------------------------------------------------------------------- ; Put byte in x0 to output port ;----------------------------------------------------------------------------- putio macro jsr <$0036 endm ;----------------------------------------------------------------------------- ; Carrier on ;----------------------------------------------------------------------------- caron macro jsr <$0038 endm ;----------------------------------------------------------------------------- ; Carrier off ;----------------------------------------------------------------------------- caroff macro jsr <$003A endm ;----------------------------------------------------------------------------- ; Wait for the given time (in seconds) ;----------------------------------------------------------------------------- sleep macro time move #@cvi(time*19200.0),x0 jsr <$0034 _slp1 wait jset #4,y:$0003,_slp1 ; Looking at bit #timer of y:flags endm ;----------------------------------------------------------------------------- ; Macro for waiting specified amount of input data from the codec ; This version modifies a, x0, and x1 ;----------------------------------------------------------------------------- waitblk macro reg,buflen,blklen if @def(sim_debug)==0 _loop ; bset #0,x:$ffe4 wait ; wait for a new sample to be received ; bclr #0,x:$ffe4 move r7,a move reg,x0 sub x0,a #>blklen*4+2,x0 jmi <_wrap cmp x0,a ; wp - rp > threshold jlo <_loop jmp <_ok _wrap move #>buflen*4,x1 add x1,a ; buffer wraparound, rp - wp + lenght > threshold cmp x0,a jlo <_loop _ok else movep x:$ffe0,x:(reg) endif endm ;--------------------------------------------------------------------- ; Frame locked version of waitblk by VE7TMA - version 0.1 ; disturbs a,b,x0,x1,y0,y1 and possibly reg,r7 as necessary ; This version will maintain sync when debugging with the OnCE port. ; Note that this version changes more registers than the original ; version. ;--------------------------------------------------------------------- ;reg is the data pntr used by the application waitblk2 macro reg,buflen,blklen ;buflen specified as # of 4 word frames ;blklen is # of frames of data to wait for if @def(sim_debug)==0 ;true if not sim_debug mode do #blklen,_newblk jset #m_tfs,x:m_sr,* ;wait for TX frame sync=0 nop jclr #m_tfs,x:m_sr,* ;wait for TX frame sync=1 nop _newblk ori #$03,mr ; mask ints move #>$fffffc,x0 ; load bit 0,1 mask _sync1 clr a #>$03,x1 ;load tx buffer offset clr b r7,a1 ;prepare to modify r7 adr and x0,a reg,b1 ;mask out bits 0&1, prep. to mod reg or x1,a #>4*blklen+3,y0 ;ld tx offset, ld SSI int/dsp pntr sep move a1,r7 ;update r7 cmp b,a #>4*buflen,y1 ;check for bfr wrap, load bfr length jmi _wrap ;if minus bfr wrapped with reg>r7 sub b,a ;obtain the SSI/dsp pntr sep cmp y0,a ;compare to desired value jeq _locked ;jump out if matched move (reg)- ;mod reg jmp _sync1 ;try again _wrap add y1,a ;add buffer length to r7 value sub b,a ;obtain the SSI/dsp pntr sep cmp y0,a ;compare to desired value jeq _locked ;jump if correct separation move (reg)- ;modify dsp pointer jmp _sync1 ;try again _locked jset #m_tfs,x:m_sr,* ;wait for TX frame sync=0 nop andi #$fc,mr ;unmask the ints else movep x:$ffe0,x:(reg) endif endm ;----------------------------------------------------------------------------- ; N1OWU: Software equivalent of hardware reset ;----------------------------------------------------------------------------- hardreset macro ; Make the processor look like it has gotten a hardware ; reset. Then switch to Mode 1, and call the bootstrap ROM. movec #$0300,sr ;set MR+CCR to reset state (disables interrupts) movec #0,sp ;Reset all the M registers, like a hardware reset does move #>$ffff,x0 move x0,m0 move x0,m1 move x0,m2 move x0,m3 move x0,m4 move x0,m5 move x0,m6 move x0,m7 reset ;reset peripherals movep #0,x:m_pll ;set PLL control register to reset state movep #$ffff,x:m_bcr ;maximum wait states for ext. memory movep #0,X:m_ipr ;reset Interript Priority Register movec #1,omr ;reset OMR and map in the bootstrap ROM nop jmp <$0 endm